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product structure : silicon monolithic integrated circuit this product has no designed protection against radioactive ra ys . 1/ 35 tsz02201-0f2f0ak00130-1-2 ? 2015 rohm co., ltd. all rights reserved. 25.mar.2016 rev.003 tsz22111 ? 14 ? 001 www.rohm.com qi packet controller transmitter(tx) receiver(rx) mcu voltage & current sensing power demodulator data nn full bridge voltage & current sensing mosfet driver load rectification mod bd57020mwv bd57015gwl ldo 19v ml610q772 adc i2c if moni1 adpin 40 39 38 37 36 35 34 33 32 31 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 30 29 28 27 26 25 24 23 22 21 tcxoout ldo33a ldo33b gpio0 gpio1gpio2 tcxoin ovpin tcxoen vdd clkset agnd intb gpio3 sda clkin scl resetb fskin vddio coil_in test lside1 sw1 boot2 hside2 lside2 sw2 hside1 pgnd moni0 ovpout refgnd vin boot1 adpv moni1 adpi addr vin bd57020mwv +- 3.3v cs cs adpin 3.3v 3.3v wireless power consortium / qi compliant series wireless power transmitter ic bd57020mwv general description bd 57020 mwv is an integrated ic for the wireless power transmitter. this device is composed of inverters for the coil drive, controller for the communication of the qi compliant and demodulating circuit, gpio, tcxo buffer, and i2c interface. bd 57020 mwv works as a controller in the wireless power transmitter based on the qi compliant by using it with a general-purpose microcomputer. bd 57020 mwv is applied to qi ver.1.2 (low power and medium power). features ? wpc / qi ver.1.2 (low power and medium power) support. ? half bridge / full bridge inverter ? foreign object detection ? gpio 4ch ? i2c bus interface ? 5.0mm x 5.0mm uqfn package 40 pin key specifications ? input power supply voltage range: 4.2 v to 5.3 v ? input adapter voltage range: 4. 6 v to 20 v ? drive frequency range: 110khz to 205khz ? operating temperature range: -20c to +85c package uqfn040v5050 5.00mm x 5.00mm x 1.00mm applications wp c compliant devices ? pc ? cradle for charge stand typical application circuit figure 2. product position in wireless power supply system figure 1. typical application circuit datashee t downloaded from: http:///
2/ 35 tsz02201-0f2f0ak00130-1-2 ? 2015 rohm co., ltd. all rights reserved. 25.mar.2016 rev.003 www.rohm.com tsz22111 ? 15 ? 001 bd57020mwv absolute maximum ratings parameter symbol rating unit vin, adpv, adpi, sw1, sw2 voltage vin_h1 -0.3 to 24 .0 v boot1, boot2 voltage vin_h2 -0.3 to 31. 0 v hside1, hside2 voltage vout_h -0.3 to 31.0 v ovpin, vddio, clkin, clkset, fskin, scl, resetb , test, addr voltage vin_l1 -0.3 to 7.0 v vdd, tcxoin voltage vin_l2 -0.3 to 4.5 v coil_in voltage vin_l3 -4.5 to 7.0 v ldo33a, ldo33b , intb, lside1, lside2, ovpout, moni0, moni1 voltage vout_l1 -0.3 to 7.0 v tcxoen, tcxoout voltage vout_l2 -0.3 to 4.5 v sda voltage vinout_l1 -0.3 to 7.0 v gpio0, gpio1, gpio2, gpio3 voltage vinout_l2 -0.3 to 4.5 v power dissipation pd 3.26 ( note 1 ) w operating ambient temperature range ta - 20 to +85 c storage temperature range tstg - 55 to +150 c (note 1) derate by 26 mw/ c when operating above ta= 25 c (mount on 4-layer 74.2 mm x 74.2 mm x 1.6mm board with front and back layer heat radiation copper foil 4.5 mm x 4.5 mm , second and third layer heat radiation copper foil 74.2 mm x 74.2 mm ). caution: operating the ic over the absolute maximum ratings may damage t he ic. the damage can either be a short circuit between pins or an open circuit between pins and the internal circuitry. therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the ic is operated over the absolute maximum ratings. recommended operating conditions (ta= -20 c to +85 c ) parameter symbol min typ max unit vin terminal input voltage range vin 4.2 5.0 5.3 v vdd terminal input voltage range vdd 3.1 3.3 3.5 v vddio terminal voltage range vddio 3.1 3.3 3.5 v adapter input voltage range vadpv 4. 6 - 20 v tcxo terminal input frequency range ftcxo 32 - 52 mhz downloaded from: http:///
3/ 35 tsz02201-0f2f0ak00130-1-2 ? 2015 rohm co., ltd. all rights reserved. 25.mar.2016 rev.003 www.rohm.com tsz22111 ? 15 ? 001 bd57020mwv electrical characteristics (unless otherwise specified vin=5v v dd =3.3v ta=25c) parameter symbol limit unit conditions min typ max whole chip operating circuit current 1 i cc1 - 2.0 3.0 ma tcxoin=0khz operating circuit current 2 i cc2 - 15.0 23.0 ma tcxoin=32mhz protection block (the ic outside) external ocp operating voltage v ocp 125 160 195 mv r s =100m protective circuit (the ic inside) vin over voltage lockout v ovlo_vin 6.1 6.4 6.7 v vin: 5.0 8.0v hysteresis on ovlo v ovlo_hys 140 200 260 mv vin: 8.0 5.0v vin under voltage lockout v uvlo_vin 3.3 3.6 3.9 v vin: 5.0 0v hysteresis on uvlo v uvlo_hys 140 200 260 mv vin: 0 5.0v vdd uvlo detection voltage v uvlod_vdd 2.25 2.50 2.75 v vdd: 3.3 0v vdd uvlo release voltage v uvlor_vdd 2.55 2.80 3.05 v vdd: 0 3.3v vddio uvlo detection voltage v uvlod_vddio 2.25 2.50 2.75 v vddio: 3.3 0v vddio uvlo release voltage v uvlod_vddio 2.55 2.80 3.05 v vddio: 0 3.3v internal ocp operating current i ocp - 0.48 0.65 a ldo33a block ldo33a output voltage v ldo33a 3.2 3.3 3.4 v i source =10ma ldo33a maximum output current i ldo33a - - 30 ma ldo33b block ld o33b output voltage v ldo33b 3.2 3.3 3.4 mv i source =10ma ldo33b maximum output current i ldo33b - - 30 ma demodulating circuit block coil_in leak current 1 ileak coilin1 - - 50 a vcoil_in=3.3v coil_in leak current 2 ileak coilin2 - 150 - - a vcoil_in=- 3.3v tcxo_buff block tcxoin input current i tcxoin - 0 1.0 a vdd=vtcxoin=4.5v input frequency range f tcxoin - - 52 mhz tcxoen l level output voltage voh txcoen - - vdd x 0.2 v i sink =1 .0 ma tcxoen h level output voltage vol txcoen vdd x 0.8 - - v i source =1 .0 ma tcxoout output impedance zo tcxoout - 1.0 - k inverter block drive frequency f drive 110 - 205 khz minimum duty ratio duty min - 25 - % dead time t dead - 200 - ns tcxoin=32mhz source resistance r source - 1.0 - sink resistance r sink - 0.8 - gpio block gpio l level input voltage vol gpio - - vdd x 0.3 v gpio h level input voltage voh gpio vdd x 0.7 - - v gpio pull-down resistor rpd gpio - 100 k gpio pull-up resister rpu gpio - 100 - k gpio l level output voltage vil gpio - - vdd x 0 .2 v i sink =1.0ma gpio h level output voltage vih gpio vdd x 0.8 - - v i source =1.0ma downloaded from: http:///
4/ 35 tsz02201-0f2f0ak00130-1-2 ? 2015 rohm co., ltd. all rights reserved. 25.mar.2016 rev.003 www.rohm.com tsz22111 ? 15 ? 001 bd57020mwv parameter symbol limit unit conditions min typ max fskin terminal fskin l level input voltage vil fskin - - vddio x 0.3 v fskin h level input voltage vih fskin vddio x 0.7 - - v clkin terminal clkin l level input voltage vil clkin - - vddio x 0.3 v clkin h level input voltage vih clkin vddio x 0.7 - - v addr terminal addr l level input voltage vil addr - - vddio x 0.3 v addr h level input voltage vih addr vd dio x 0.7 - - v intb terminal open drain ability on intb vl intb - 380 500 mv i sink =5.0ma intb leak current ileak intb - - 2.0 a vintb=7.0v resetb terminal resetb l level input voltage vil rstb - - vdd x 0.3 v resetb h level input voltage vih rstb vd d x 0.7 - - v resetb pull-up resister rpd rstb - 100 - k i2c interface scl, sda l level input voltage vil i2c - - 0.50 v scl, sda h level input voltage vih i2c 1.50 - - v scl, sda l level input current iil i2c -1.0 - - a scl, sda h level input current iih i2c - - 1.0 a sda l level output voltage vol i2 c - - 40 0 mv i sink =3.0ma pin configuration figure 3. pin configuration 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 30 29 28 27 26 25 24 23 22 21 40 39 38 37 36 35 34 33 32 31 clkset tcxoout agnd ldo33a ldo33b moni0 intb gpio0 gpio1 gpio2 gpio3 ovpout coil_in sda refgnd test vin lside1 boot1 sw1 boot2 hside2 lside2 sw2 hside1 adpv clkin scl moni1 resetb pgnd adpi tcxoin fskin addr ovpin tcxoen vdd vddio vin (top view) downloaded from: http:///
5/ 35 tsz02201-0f2f0ak00130-1-2 ? 2015 rohm co., ltd. all rights reserved. 25.mar.2016 rev.003 www.rohm.com tsz22111 ? 15 ? 001 bd57020mwv pin description pin no. pin name function i/o 1 ovpin 5.0v input, connected to ovpout. i 2 ldo33b 3.3v ldo output. o 3 ldo33a 3.3v ldo output. o 4 vdd 3.3v supply. i 5 tcxoen connected to external oscillator. control signal output. o 6 tcxoin connected to external oscillator . i 7 tcxoout connected to external oscillator . o 8 gpio0 general-purpose input and output terminal. i/o 9 gpio1 general- pur pose input and output terminal. i/o 10 gpio2 general-purpose input and output terminal. i/o 11 gpio3 general-purpose input and output terminal. i/o 12 vddio 3.3v supply. i 13 clkin clock input terminal, leave this pin open. i 14 clkset test terminal , leave this pin open. i 15 fskin fsk control signal input. i 16 scl i2c clock input i 17 sda i2c data input and output. i/o 18 intb interrupt detection output. o 19 resetb control logic reset i/o 20 agnd a nalo g ground. i 21 coil_in coil current / voltage input. i 22 test test terminal, connected to gnd. i 23 boot2 connected to boot strap capacitor. i 24 sw2 connected to the source of high side fet and the drain of low sid e fet. i 25 hside2 connected to the gate of high side fet. o 26 lside2 connected to the gate of low side fet. o 27 pgnd power ground. i 28 lside1 connected to the gate of low side fet. o 29 hside1 connected to the gate of high side fet. o 30 sw1 connected to the source of high side fet and the drain of low sid e fet. i 31 boot1 connected to boot strap capacitor. i 32 addr slave address change. i 33 ovpout 5.0v output, connected to ovpin. o 34 vin 5.0v input power supply i 35 vin 5.0v input power supply i 36 moni0 coil current value output. o 37 moni1 input voltage value output. o 38 adpi sense transmitter input current. i 39 adpv sense transmitter input voltage. i 40 refgnd reference ground. i downloaded from: http:///
6/ 35 tsz02201-0f2f0ak00130-1-2 ? 2015 rohm co., ltd. all rights reserved. 25.mar.2016 rev.003 www.rohm.com tsz22111 ? 15 ? 001 bd57020mwv driver ldo ldo ldo33a demod vdd tcxo buff uvlo tsd ovp osc driver ldo33b tcxoen tcxoin vin adpv hside2 hside1 lside2 boot2 sw2 boot1 sw1 lside1 coil_in intb resetb addr sda pgnd agnd refgnd adpi fskin tcxoout clkset scl vddio vdd power_sense ovpin ovpout moni1 vdd vdd control logic clkin io vdd gpio gpio3 gpio2 gpio1 gpio0 moni0 block diagram figure 4. block diagram downloaded from: http:///
7/ 35 tsz02201-0f2f0ak00130-1-2 ? 2015 rohm co., ltd. all rights reserved. 25.mar.2016 rev.003 www.rohm.com tsz22111 ? 15 ? 001 bd57020mwv description of blocks 1. pre-driver block transmitter (tx) includes inverter circuits to input ac electricity into both ends of the primary coil and to produce the electromotive force on the secondary side by electromagne tic induction. bd 57020mwv includes two pre-driver blocks to support half bridge inverter and full bridge inverter configurations. for the half bridge inverter configuration, it is necessary to set the pre-driver 1 (pwm0 signal). for the full br idge inverter configuration, it is necessary to set the pre-driver 1 and pre-driver 2 (pwm1 signal). the output powe r control modes are the frequency control, the duty control and the phase control. the pre-driver block prevents a thr ough cu rrent by monitoring the on/off timing of low side fet and high side fet. for high efficiency, the bootstrap drive system which sets the h side-l side to nch fet is adopted. it is necessary to put a capacitor (0.1 C 0.47 f) between the boot1 (boot2) terminal and the sw1 (sw2) termina l to maintain the voltage potential between these pins. install a ceramic capacitor as c lose to these pins as possible. 2. digital ping tx inputs ac electricity into the primary coil and by electro magnetic induction develops an electromotive force on the seconda ry coil which starts the receiver (rx). this phase is called digital ping . tx keeps transmitting power as long as it receives digital ping from the rx. tx controls the transmissio n power based on a packet including the power incoming information from rx. the following registers are used to config ure digital ping. (1) pwm0prd : setting register for the period of pwm0 signal this register is used to set the period of pwm0 signal. the pwm0 signal sets the period of the pulse to be output from pre-driver 1 with a count level. the relation between the period of pwm0 signal and source clock is determined b y the following formula: 1 0 ? ? ?? ? ? ?? ? ? k targetcloc k sourcecloc round prd pwm r ound means rounding off to the nearest whole number for example, if source clock=32mhz and target clock=100khz, pwm0prd registe r is set to the following value: 0x013f 319 1 100 32000 0 ? ? ? ?? ? ?? ? ? round prd pwm name add- ress b7 b6 b5 b4 b3 b2 b1 b0 initial value r/w pwm0 prdl 0x20 pwm0 prd7 pwm0 prd6 pwm0 prd5 pwm0 prd4 pwm0 prd3 pwm0 prd2 pwm0 prd1 pwm0 prd0 0x00 r/w pwm0 prdh 0x21 pwm0 prd15 pwm0 prd14 pwm0 prd13 pwm0 prd12 pwm0 prd11 pwm0 prd10 pwm0 prd9 pwm0 prd8 0x00 r/w after pwm0dtyh (0x23) is written, this register is updated with the new data. (2 ) pwm0dty : setting register for the duty of pwm0 signal this register is used to set the duty of pwm0 signal. pwm0 sig nal is the output signal at pre-driver 1. t he duty of pwm0 signal is set with the count number of the source clock. af ter this register has been written, when the counter number o f pwm0 signal becomes 0, the data of pwm0prd register and pw m0dty register are updated with the new data. the relation between the duty of pwm0 signal and source clock is determined by the following formula: ? ? ? ? ? ? ? ? ?? ? ?? ? ? ? ? 100 1 0 0 duty prd pwm int dty pwm int means rounding down to the nearest whole number for example, if source clock= 32mhz and target clock=100khz wi th duty=50%, pwm0dty register is set to the following value: ? ? 0x00a0 160 100 50 1 320 0 ? ? ? ? ? ? ? ? ?? ? ?? ? ? ? ? int dty pwm downloaded from: http:///
8/ 35 tsz02201-0f2f0ak00130-1-2 ? 2015 rohm co., ltd. all rights reserved. 25.mar.2016 rev.003 www.rohm.com tsz22111 ? 15 ? 001 bd57020mwv duty is defines as the ratio between the amount of time when the output is high in one period to the whole period o f pwm0 si gn al . the enable range of pwm0dty register is from 0x0001 to (pw m0prd-1). pw m0 will not be generated if the pwm0dty register is set to a value greater than or equal to th e value in pwm0prd register. name add- ress b7 b6 b5 b4 b3 b2 b1 b0 initial value r/w pwm0 dtyl 0x22 pwm0 dty7 pwm0 dty6 pwm0 dty5 pwm0 dty4 pwm0 dty3 pwm0 dty2 pwm0 dty1 pwm0 dty0 0x00 r/w pwm0 dtyh 0x23 pwm0 dty15 pwm0 dty14 pwm0 dty13 pwm0 dty12 pwm0 dty11 pwm0 dty10 pwm0 dty9 pwm0 dty8 0x00 r/w (3 ) pwm1phs: setting register for the phase difference between pwm1 si gnal and pwm0 signal this register is used to set the phase difference between pwm1 signal and pwm0 signal with the count number of the source clock. pwm1 signal is a signal with the same pe riod and duty as pwm0 signal. after pwm0dtyh register (0x23) is written and the counter number of pwm0prd re gister becomes 0, the data of this register is updated with the new data. the enable range of this register is from 0x0001 to (pwm0prd). pwm1 signal will not be generated if the pwm1phs register is set to a value greater than or equal to the value in pwm0p rd register. it is also necessary to write 0x23 in pwm0dtyh register after this register has been written. name add- ress b7 b6 b5 b4 b3 b2 b1 b0 initial value r/w pwm1 phsl 0x24 pwm1 phs7 pwm1 phs6 pwm1 phs5 pwm1 phs4 pwm1 phs3 pwm1 phs2 pwm1 phs1 pwm1 phs0 0x00 r/w pwm1 phsh 0x25 pwm1 phs15 pwm1 phs14 pwm1 phs13 pwm1 phs12 pwm1 phs11 pwm1 phs10 pwm1 phs9 pwm1 phs8 0x00 r/w (4 ) pwm0gen: setting register for the dead time of pwm0 signal this register is used to set the dead time of pwm0 signal. the relation between the dead time and the sour ce clock is defined by the following formula: k sourcecloc deadtime 2 ? for example, if source clock=32mhz, dead time is the smallest v alue and it is 62.5nsec. additionally, please set this register to the following value. full bridge inverter: pwmgen0= 0x49 half bridge inverter: pwmgen0= 0x10 name add- ress b7 b6 b5 b4 b3 b2 b1 b0 initial value r/w pwmgen0 0x30 p0dly d1 p0dly d0 p0dly c2 p0dly c1 p0dly c0 p0dly b2 p0dly b1 p0dly b0 0x92 r/w (5 ) pwm1gen: setting register for the dead time of pwm1 signal this register is used to set the dead time of pwm1 signal. the relation between the dead time and source clock is determined by the following formula: k sourcecloc deadtime 2 ? for example, if source clock=32mhz, dead time is the smallest v alue and it is 62.5nsec. additionally, please set this register to the following value. full bridge inverter: pwmgen1= 0x49 half bridge inverter: pwmgen1= 0x10 name add- ress b7 b6 b5 b4 b3 b2 b1 b0 initial value r/w pwmgen1 0x31 p1dly d1 p1dly d0 p1dly c2 p1dly c1 p1 dly c0 p1dly b2 p1dly b1 p1dly b0 0x92 r/w (6) pwrctrl: setting register for the operation mode this register is used to set the operation mode and the b ase clock for the internal movement. by setting the power m ode bit (pwmd0, pwmd1), the operation mode is changed. the operati on mode is digital ping when pwmd=0x0. meanwhile, the operation mode is analog ping , which is also the low power consumption mode, when pwm d=0x1 . on the other hand, the operation is stop mode when pwmd=0x3 . during stop mode, all blocks are stopped. bd 57020 mwv uses the input clock signal from tcxoin terminal for source clo ck of the internal movement. please set this register with tcxsel = 1, and connect tcxo with frequency between 32 to 52 mhz to tcxoin terminal. when tcxsel = 1 and tcxen = 1, tcxoen terminal becomes high output but when tcxsel = 1 and tcxen = 0, downloaded from: http:///
9/ 35 tsz02201-0f2f0ak00130-1-2 ? 2015 rohm co., ltd. all rights reserved. 25.mar.2016 rev.003 www.rohm.com tsz22111 ? 15 ? 001 bd57020mwv tcxoen terminal becomes low output. please set this register with oscsel= 1 to use an internal oscillator clock for measuring analog ping internal period. ? [7:6] reserved ? [5:4] pwmd0, pwmd1 : s etting bit for operation mode (0x0: digital ping mode 0x1: analog ping mode 0x2: reserved 0x 3:stop mode) ? [3] reserved ? [2] oscsel: control bit for using internal oscillator (0x1: enable 0x0: disable) ? [1] tcxen: control bit for using external tcxo (0x1: enable 0x0: disable) ? [0] tcxsel: selection bit for using external tcxo (0x1: enable 0x0: disable) name add- ress b7 b6 b5 b4 b3 b2 b1 b0 initial value r/w pwrctrl 0x0f - * 1 - * 1 pwmd1 pwmd0 - * 1 oscsel tcxen tcxsel 0x07 r/w *1 prohibition against writing (7) pdctrl: control register for the pre-driver output this register is used to enable pre-driver 1 and pre-driver 2 . pre -driver 1 drives hside1 terminal and lside1 terminal while pre-driver 2 drives hside2 terminal and lside2 terminal. when pden= 1, the pulse is produced at hside1 terminal and lside1 terminal. when pden=0, the pulse is stopped. whe n pwm1en=1, the pulse is produced at hside2 terminal and lside2 terminal. when pwm1en=0, the pulse is stopped. refer t o 3. fsk (frequency shift keying) for the explanation of pswen and ps256. ? [7:5] reserved ? [4] pwm1en: control bit for p re -driver 2 (0x1: enable 0x0: disable) ? [3] reserved ? [2] ps256: change the pwm output to every 256 cycles ? [1] pswen: control of the pwm change function ? [0] pden : control bit for p re -driver 1 (0x1: enable 0x0: disable) name add- ress b7 b6 b5 b4 b3 b2 b1 b0 initial value r/w pdctrl0 0x12 - * 1 - * 1 - * 1 pwm1 en - * 1 ps256 pswen pden 0x00 r/w *1 prohibition against writing 3. fsk (frequency shit keying) bd 57020 mwv transmits a packet to rx using frequency shift keying (fsk) to esta blish communication with rx. when tx transmits a packet using fsk, tx changes the frequency of the pwm0 signal by pre-driver 1 into t he drive frequency (fd) and the modulation frequency (fmod) every 256 periods. that d rive frequency is the frequency of the pwm0 signal which set in 2. (1).that fsk modulation frequency is the frequency of the pwm0 signal which set in 3. the setting of fsk sets the following registers. (1 ) pwmxprd: setting register for the period of the pwm0 signal at fsk this register is used to set the period of pwm0 signal whe n pswen=1 (pdctrl0: 0x12) and fskin terminal = high. the relation between the period of pwm0 signal and source clock is determined by the formula below, and it is expressed in the same formula as pwm0prd. 1 ? ? ?? ? ? ?? ? ? k targetcloc k sourcecloc round pwmxprd r ound means rounding off to the nearest whole number name add- ress b7 b6 b5 b4 b3 b2 b1 b0 initial value r/w pwmx prdl 0x26 pwmx prd7 pwmx prd6 pwmx prd5 pwmx prd4 pwmx prd3 pwmx prd2 pwmx prd1 pwmx prd0 0x00 r/w pwmx prdh 0x27 pwmx prd15 pwmx prd14 pwmx prd13 pwmx prd12 pwmx prd11 pwmx prd10 pwmx prd9 pwmx prd8 0x00 r/w (2 ) pwmxdty: setting register for the duty of the pwm0 signal at fsk this register is used to set the duty of pwm0 signal whe n pswen=1 (pdctrl0: 0x12) and fskin terminal = high. the downloaded from: http:///
10 / 35 tsz02201-0f2f0ak00130-1-2 ? 2015 rohm co., ltd. all rights reserved. 25.mar.2016 rev.003 www.rohm.com tsz22111 ? 15 ? 001 bd57020mwv relation between the duty of pwm0 signal and source clo ck is determined by the formula below, and it is expressed in a same formula as pwm0dty. ? ? ? ? ? ? ? ? ?? ? ?? ? ? ? ? 100 1 duty pwmxprd int pwmxdty int means rounding down to the nearest whole number name add- ress b7 b6 b5 b4 b3 b2 b1 b0 initial value r/w pwmx dtyl 0x28 pwmx dty7 pwmx dty6 pwmx dty5 pwmx dty4 pwmx dty3 pwmx dty2 pwmx dty1 pwmx dty0 0x00 r/w pwmx dtyh 0x29 pwmx dty15 pwmx dty14 pwmx dty13 pwmx dty12 pwmx dty11 pwmx dty10 pwmx dty9 pwmx dty8 0x00 r/w (3) pdctrl: control register for p re -driver output this register is used to change the frequency of pwm0 signal by setting pswen and ps256. when pswen=1, the fr equency and duty of pwm0 signa l are changed by input signal of fskin terminal. ? when pswen = 0, the data of pwm0 signal is updated to the data of pwm0prd and pwm0dty. ? when of pswen = 1 and fskin terminal = low, the data of pwm0 signal is updated to the data of pwm0prd register and pwm0dty register. ? when of pswen = 1 and fskin terminal = high, the data of pwm0 signal is upd ated to the data of pwmxp rd register and pwmxdty register . when ps256 is 1, the period and the duty of pwm0 are changed by in put signal of fskin terminal every 256 cycles. after having taken in a change of external terminal fskin, during 256 cy cles of the output frequency, the next change is n t taken. furthermore, an interrupt occurs every 256 cycles of the ou tput frequency when pxien bit of register intenb (0x04) is 1. whenever an interrupt occurs, the output frequency from a pre-driver i s changed by changing input of external terminal fskin every 256 cycles. name add- ress b7 b6 b5 b4 b3 b2 b1 b0 initial value r/w pdctrl0 0x12 - * 1 - * 1 - * 1 pwm1 en - * 1 ps256 pswen pden 0x00 r/w *1 prohibition against writing 4. analog ping bd 57020 mwv outputs pulse signal from primary coil to detect if rx w as put on the interface of the tx. the presence of rx is confirmed if bd 57020mwv detects a change in the coil current or voltage . when the change of the coil current or voltage reaches the threshold value of the analog ping detection, the state shifts to digital ping . additionally , bd 57020mwv will generate an interrupt after analog ping executes a set number of times. in analog ping, it is necessary to dr ive a primary coil near the resonant frequency. the setting of the frequency is performe d right before an output of analog ping, like digital ping . set the following registers to configure analog ping. (1) apgctrl: control register for analog ping this register is used to set the start and stop of analog ping and the expected value of rx detection by analog ping . bd 57020 mwv starts analog ping when apen =1 is set . the period and duty of pwm0 should be set before apen is set to 1. bd 57020mwv stops analog ping when apen =0 is set . when the state of the coil_in terminal is matched with the expected value of this register, bd57020mwv detects rx . when apen is 1, bd57020mwv becomes the stand-by state, the circuit electric current decrease s. bd 57020mwv will execute analog ping until any of the two c onditions is met: 1.) analog ping finishes the set number of repeated execution wi thout detecting any rx. 2.) rx is detected wherein it generates an interrupt and stops analog ping. the expected val ue of analog ping is configured as follows: ? [7] apen: control bit for analog ping (0x1: enable 0x0 disable) ? [6:2] reserved ? [1:0] apex0, apex1: expected value of analog ping (0x1 : detect the rx 0x0 : not detect the rx 0x2, 0x3: reserved) name add- ress b7 b6 b5 b4 b3 b2 b1 b0 initial value r/w apgctrl 0x16 apen - * 1 - * 1 - * 1 - * 1 - * 1 apex1 apex0 0x00 r/w *1 prohibition against writing (2)apgstt: analog ping status register this register shows status of analog ping. downloaded from: http:///
11 / 35 tsz02201-0f2f0ak00130-1-2 ? 2015 rohm co., ltd. all rights reserved. 25.mar.2016 rev.003 www.rohm.com tsz22111 ? 15 ? 001 bd57020mwv ? [7] reserved ? [6:4] apsta2, apsta1, apsta0 : analog ping status (0x0: stop 0x1 : u nder the standby set in apgivt 0x3: under the power output set in apgidur 0x5: under the measurement set in apgmsr 0x6: a state of the input accorded wi th a value of the apex. bd 57020mwv generates an interrupt and stop. 0x7: the number of analog ping execution times reached the set number. bd 57020mwv generates an interrupt and stop. others: reserved) ? [3:0] reserved name add- ress b7 b6 b5 b4 b3 b2 b1 b0 initial value r/w apgstt 0x17 - * 1 apsta2 apsta1 apsta0 - * 1 - * 1 - * 1 - * 1 0x00 r/w *1 prohibition against writing (3) apgitvl: setting register for the interval time of analog ping this register is used to set the interval time of analog ping. if the analog ping detection interval is set short, time from rx establishment on tx to tx starting power feeding is sho rt. however, the power consumption of tx increases the analog ping detection interval is set by interval with interna l oscillation clock (typ.100khz) . the relation between the interval time and input clock is determined by the following f ormula: ? ? 1 ? ? ? inputclock me intervalti apgitv for example, if input clock = 100khz and time of interval time=500 msec, the value of apgitv register is s et to the following value: ? ? 0xc34f 49999 1 100 500 ? ? ? ? ? apgitv name add- ress b7 b6 b5 b4 b3 b2 b1 b0 initial value r/w apgitvl 0x18 apg itv7 apg itv6 apg itv5 apg itv4 apg itv3 apg itv2 apg itv1 apg itv0 0x00 r/w apgitvh 0x19 apg itv15 apg itv14 apg itv13 apg itv12 apg itv11 apg itv10 apg itv9 apg itv8 0x00 r/w (4) apgdur: setting register for the duration time of analog ping this register is used to set the duration time of analog ping. duration time is defined as the time frame wherein bd 57020 mwv produces the pulse output and drives the primary coil . the input clock from tcxoin terminal is a source clock. the relation between the duration time and source cloc k is determined by the following formula: 1 1000 1 ? ? ? ? ? ? ? ?? ? ?? ? ? ? ? k sourcecloc me durationti int apgdur int means rounding down to the nearest whole number for example, if the time of duration is 100 sec and source clock is 32mhz, the value of apgdur register is s et to the following value: 0x0c7f 3199 1 1000 1 32000 100 ? ? ? ? ? ? ? ? ? ?? ? ?? ? ? ? ? int apgdur name add- ress b7 b6 b5 b4 b3 b2 b1 b0 initial value r/w apgdurl 0x1a apg dur7 apg dur6 apg dur5 apg dur4 apg dur3 apg dur2 apg dur1 apg dur0 0x00 r/w apgdurh 0x1b - * 1 - * 1 - * 1 - * 1 apg dur11 apg dur9 apg dur8 apg dur7 0x00 r/w *1 prohibition against writing (5) apgmsr: setting register for the measurement time of analog ping this register is used to set the measurement time of analog ping . measurement time is defined as the time frame after the duration time wherein bd 57020 mwv monitors the state of coil_in to confirm the presence of rx . the input clock downloaded from: http:///
12 / 35 tsz02201-0f2f0ak00130-1-2 ? 2015 rohm co., ltd. all rights reserved. 25.mar.2016 rev.003 www.rohm.com tsz22111 ? 15 ? 001 bd57020mwv from tcxoin terminal is a source clock. the relation between th e measurement time and source clock is determined by the following formula: 1 1000 1 ? ? ? ? ? ? ? ?? ? ?? ? ? ? ? k sourcecloc ttime measuremen int apgmsr int means rounding down to the nearest whole number for example, if measurement time= 10 sec and source clock is 32mhz, apgmsr register is set to the followin g val ue: 0x013f 319 1 1000 1 32000 10 ? ? ? ? ? ? ? ? ? ?? ? ?? ? ? ? ? int apgmsr name add- ress b7 b6 b5 b4 b3 b2 b1 b0 initial value r/w apgmsrl 0x1c apg msr7 apg msr6 apg msr5 apg msr4 apg msr3 apg msr2 apg msr1 apg msr0 0x00 r/w apgmsrh 0x1d - * 1 - * 1 - * 1 - * 1 apgms r11 apgms r10 apgms r9 apgms r8 0x00 r/w *1 prohibition against writing (6) apgcnt: setting register for the execution number of times of ana log ping this register is used to set the number of times analog ping carri es out automatically. if apgcnt= 0, analog ping is carried out until apen bit of apgctrl register is 0. if apien=1 in the intenb register, when the number of analog ping execution times reaches the set number, bd57020mwv generates an interrupt signal. bd57020mwv keeps generating an interrupt signal until apen bit of apgctrl register is 0. name add- ress b7 b6 b5 b4 b3 b2 b1 b0 initial value r/w apgcnt 0x1e apg cnt7 apg cnt6 apg cnt5 apg cnt4 apg cnt3 apg cnt2 apg cnt1 apg cnt0 0x00 r/w 5. interrupt control bd 57020 mwv generates various interrupt signals. set the following regi sters f or generating the interrupt signal. (1) intstt: interrupt status register this register shows an interrupt status when an interrupt fact or occurred. when any bit of this register is set, bd 57020 mwv generates an interrupt signal on intb terminal. whe n the bit is set to 1, the interrupt signal is cleared. ? [7] reserved ? [6] apint: an interrupt signal of analog ping occurs. ? [5] reserved ? [4] agint: an interrupt signal by the protection movement occurs. ? [3] eint: an interrupt signal by parity error or the framing error occurs during the packet reception. ? [2] cint: an interrupt signal by the check sum error occurs during the packet reception. ? [1] rint2: an interrupt signal by the normal completion during the packet reception of demodul ating circuit 2. ? [0] rint1: an interrupt signal by the normal completion during t he packet reception of demodulating circuit 1. name add- ress b7 b6 b5 b4 b3 b2 b1 b0 initial value r/w intstt 0x03 - * 1 apint - * 1 agint eint cint rint2 rint1 0x00 r/w *1 prohibition against writing (2) intenb: control register for an interrupt this register is used to control an interrupt signal. w hen the interrupt factor that is set to 1 by this register oc curred, a bit to support of the interrupt status register is set. but there is no bit of the interrupt status register (intstt) corresponding to pxien of the interrupt enable register (intenb). because the admitted interrupt occurs in 1 pulse by pxien, the status at the time of the outbreak of interrupt is not maintained . ? [7] pxien: control bit for an interrupt signal every 256 cycles by pwm ch ange function ? [6] apint : control bit for an interrupt signal in analog ping ? [5] reserved ? [4] agint: control bit for an interrupt signal by protection movement ? [3] eint: control bit for an interrupt signal by the parity error or the f raming error during the packet reception ? [2] cint: control bit for an interrupt signal by the check sum error d uring the packet reception ? [1] rint2: control bit for an interrupt signal by normal completion a t demodulating circuit 2 during the packet downloaded from: http:///
13 / 35 tsz02201-0f2f0ak00130-1-2 ? 2015 rohm co., ltd. all rights reserved. 25.mar.2016 rev.003 www.rohm.com tsz22111 ? 15 ? 001 bd57020mwv reception ? [0] rint1: control bit for an interrupt signal by normal completion a t demodulating circuit 1 during the packet reception name add- ress b7 b6 b5 b4 b3 b2 b1 b0 initial value r/w intenb 0x04 pxien apien - * 1 agien eien cien rien2 rien1 0x00 r/w *1 prohibition against writing 6. am demodulator block bd 57020 mwv has the two am demodulator blocks for communication w ith rx. the characteristics of demodulator blocks are different to improve communication stability. the foll owing registers are used for the configuration of the demodu lator blocks. (1) rxctrl: control register for packet reception this register is used to control the demodulating blocks . if pre1 bit =1 , the demodulator 1 is enabled to receive the packets . if pre2 bit=1 , the demodulator 2 is enabled to receive the packets. it is possible to set both pre1 bit and pre2 bit to 1 at the same time , then demodulator 1 and demodulator 2 works independentl y. the digital filters of the demodulators are enabled if fte1 bit and fte2 bit are set to 1 in this register. in order t o raise communication stability, please be sure that the digital filters are enabled. if other demodulating circuit is receiving a packet even i f reception error (frame error, parity error or check sum error) occurs in demodulating circuit 1 or demodulating circuit 2 while ctrl is 0, it does not generate an interrupt. if ctrl bit = 1 and a reception error occurs on demodulat or 1 or demodulat or 2, bd 57020mwv generates an interrupt signal immediate ly . ? [7] ctrl: setting bit of exclusive control function ? [6] reserved ? [5] fte2: setting bit for the digital filter of the demodulat or 2 ? [4] fte1: setting bit for the digital filter of the demodulat or 1 ? [3:2] reserved ? [1] pre2: setting bit for the demodulat or 2 ? [0 ] pre1: setting bit for the demodulat or 1 name add- ress b7 b6 b5 b4 b3 b2 b1 b0 initial value r/w rxctrl 0x01 ctrl - * 1 fte2 fte1 - * 1 - * 1 pre2 pre1 0x00 r/w *1 prohibition against writing (2) rxstt: packet reception status register this register holds the status of the packet reception of the demodulating circuit. if packet reception with demodulating circuit 1 is completed normally, rcv1 becomes 1. if packet reception with demodulating circuit 2 is comple ted normally, rcv2 becomes 1. if check sum error occurs during the packet reception with demo dulating circuit 1 or demodulating circuit 2, cerr becomes 1. if parity error or framing error occurs during the packet reception w ith demodulating circuit 1 or demodulating circuit 2 , p err becomes 1. the factors of the framing error during packet reception are as foll ows: ? stop bit is not found. ? reception was completed in the middle of a byte. ? the packet size that is calculated from the value of the header byte is different from the one that is received. in addition, rcv1, rcv2, cerr and rerr, latch when packet reception i s completed . t he se are cleared if rint1, rint2, cint and rint (intstt:0x03) are written 1.these are overwritten when the ne xt packet is received. when demodulating circuit 1 is receiving packet, bsy1 bec omes 1. when demodulating circuit 2 is receiving packet, bsy 2 becomes 1. ? [7] bsy2: in receiving a packet with demodulating circuit 2 ? [6] bsy1: in receiving a packet with demodulating circuit 1 ? [5:4] reserved ? [3] perr : parity error or framing error occurs during the packet reception with demod ulating circuit 1 or de modulating circuit 2 ? [2] cerr: check sum error occurs during the packet reception with demodulating circuit 1 or demodulating circuit 2 ? [1] rcv2: packet reception is completed with demodulating circuit 2 normally ? [0] rcv1: packet reception is completed with demodulating circuit 1 normally name add- ress b7 b6 b5 b4 b3 b2 b1 b0 initial value r/w rxstt 0x02 bsy2 bsy1 - * 1 - * 1 rerr cerr rcv2 rcv1 0x00 r *1 prohibition against writing (3) clkdiv: register for setting clock frequency division downloaded from: http:///
14 / 35 tsz02201-0f2f0ak00130-1-2 ? 2015 rohm co., ltd. all rights reserved. 25.mar.2016 rev.003 www.rohm.com tsz22111 ? 15 ? 001 bd57020mwv this register sets the fundamental period of the demodul ating circuit. th is set the fundamental period (clkdiv) with a count level. the value of clkdiv must be set so that target clock becomes 16khz (62.5sec). clkdiv is determined by the following formula: 1 2 ? ? ?? ? ? ?? ? ? ? k targetcloc k sourcecloc int clkdiv int means rounding down to the nearest whole number for example, if source clock is 32mhz, clkdiv set to the following value : 0x03e7 999 1 2 16 32000 ? ? ? ?? ? ?? ? ? ? int clkdiv name add- ress b7 b6 b5 b4 b3 b2 b1 b0 initial value r/w clkdiv1l 0x0c clk div7 clk div6 clk div5 clk div4 clk div3 clk div2 clk div1 clk div0 0xe7 r/w clkdiv1h 0x0d clk div15 clk div14 clk div13 clk div12 clk div11 clk div10 clk div9 clk div8 0x03 r/w (4) fltprd: register for setting filter fundamental period this register appoints the fundamental period of the digit al filter. this set the fundamental period (fltprd) with a coun t level . the value of clkdiv must be set so that target clock becomes 2khz (500sec). fltprd is determined by the following formula: 1 ? ? ?? ? ? ?? ? ? k targetcloc k sourcecloc round fltprd r ound means rounding off to the nearest whole number for example, when source clock is 32mhz, clkdiv is set to the following value: 0x3e7f 15999 1 2 32000 ? ? ? ?? ? ?? ? ? round fltprd name add- ress b7 b6 b5 b4 b3 b2 b1 b0 initial value r/w fltprdl 0xa0 flt prd7 flt prd6 flt prd5 flt prd4 flt prd3 flt prd2 flt prd1 flt prd0 0x00 r/w fltprdh 0xa1 flt prd15 flt prd14 flt prd13 flt prd12 flt prd11 flt prd10 flt prd9 flt prd8 0x00 r/w (5) rxstt_1: packet reception status register 1 this register holds the packet reception status of demodulati ng circuit 1. ? [7] pre1: in searching the preamble of the packet with demodulating circuit 1 ? [6] bsy1: in receiving a packet with demodulating circuit 1 ? [5] rdn1:packet reception is completed with demodulating circuit 1 ? [4] erf1:framing error occurs during the packet reception with demodu lating circuit 1 ? [3] erp1:parity error occurs during the packet reception with demodula ting circuit 1 ? [2] erc1:check sum error occurs during the packet reception with demodu lating circuit 1 ? [1] rcv2:packet reception is completed with demodulating circuit 2 normally ? [0] rcv1:packet reception is completed with demodulating circuit 1 normally name add- ress b7 b6 b5 b4 b3 b2 b1 b0 initial value r/w rxstt_1 0x52 pre1 bsy1 rdn1 erf1 erp1 erc1 rcv2 rcv1 0x00 r (6 ) rxstt_2: packet reception status register 2 this register holds the packet reception status of demodulatin g circuit 2. ? [7] pre2: in searching the preamble of the packet with demodulatin g circuit 2 ? [6] bsy 2: in receiving a packet with demodulating circuit 2 ? [5] rdn 2:packet reception is completed with demodulating circuit 2 ? [4] erf2:framing error occurs during the packet reception with demodu lating circuit 2 ? [3] erp2:parity error occurs during the packet reception with demodu lating circuit 2 downloaded from: http:///
15 / 35 tsz02201-0f2f0ak00130-1-2 ? 2015 rohm co., ltd. all rights reserved. 25.mar.2016 rev.003 www.rohm.com tsz22111 ? 15 ? 001 bd57020mwv ? [2] erc2:check sum error occurs during the packet reception with demod ulating circuit 2 ? [1] rcv 1:packet reception is completed with demodulating circuit 1 norm ally ? [0] rcv 2:packet reception is completed with demodulating circuit 2 norm ally name a dd - ress b7 b6 b5 b4 b3 b2 b1 b0 initial value r/w rxstt_2 0x53 pre2 bsy2 rdn2 erf2 erp2 erc2 rcv1 rcv2 0x00 r (7 ) rxdat_1 : p acket data register 1 this enables to show the data of the packet that is received with demodulating circuit 1. size of the buffers recei ving qi packet is 32 bytes. the longest packet prescribed in qi i s 29 bytes (including a header and the check sum byte). so bd57020mwv receive the packet of all kinds . the buffer to receive qi packet is one to be 32 bytes, and the packet that is received is stored by the top of the buffer memory and is overwritten when bd57020mwv receive the next packet. name add- ress b7 b6 b5 b4 b3 b2 b1 b0 initial value r/w rxdat_1 0x60 : 0x7f 0x00 r (8) rxdat_2: packet data register 2 this enables to show the data of the packet that is received with demodulating circuit 1. size of the buffers recei ving qi packet is 32 bytes. the buffer to receive qi packet is one to be 32 bytes, and the packet that is received is stored by the top of the buffer memory and is overwritten when bd57020mwv recei ve the next packet. name add- ress b7 b6 b5 b4 b3 b2 b1 b0 initial value r/w rxdat_2 0x80 : 0x9f 0x00 r 7. about the input power detection during wireless power transmission, w hen a foreign object such as a piece of metal exists on the charge interface between tx and rx, it generates heat, which poses a risk to cause burns and m ay even damage the rx . bd57020mwv monitors the input power to the tx and finds transmission electricity and detects the existence of the foreign object by com paring the transmission electricity with the received power electricity i nformation (received power packet) from rx. bd57020mwv calculates the input power by monitoring the input voltage and t he input current of the tx. about the input voltage (adpv terminal voltage) detection, bd5702 0mwv can output the voltage of adpv terminal voltage 0.1 from moni1 terminal by the following register setting. in a ddition, it uses an external current detection amplifier about the input current detection . from them, the transmission electricity is calculated. (1) ainsel: analog input choice register by this register, moni1 terminal outputs the voltage of adpv terminal voltage 0.1. ? [7:2] reserved ? [1] ain1sel1 0x2 adpv terminal volta ge ? [0] reserved name add- ress b7 b6 b5 b4 b3 b2 b1 b0 initial value r/w ainsel 0x08 - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 ain1 sel1 - *1 0x00 r/w *1 prohibition against writing 8. low drop out (ldo) block bd 57020 mwv is equipped with two ldo blocks. on ldo33a terminal, it is assumed that the power supply of the microcomputer is connected. capacitors (0.47 ~ 2.0f) are nec essary between the ldo terminals (ldo33a and ldo33b) and gnd. please place the capacitors as close to ldo33a and ldo33 b terminals as possible. 9. about a general-purpose terminal (gpio) bd 57020 mwv has four gpio terminals as a general-purpose terminal. the follo wing register are used to configure th e gpio terminals. (1) gpdir: input and output direction setting register of the gpio port this register sets each gpio port as an input terminal or output terminal. if set to 1, the port become s an output terminal. on the other hand, if set to 0, the port becomes an input terminal. downloaded from: http:///
16 / 35 tsz02201-0f2f0ak00130-1-2 ? 2015 rohm co., ltd. all rights reserved. 25.mar.2016 rev.003 www.rohm.com tsz22111 ? 15 ? 001 bd57020mwv name add- ress b7 b6 b5 b4 b3 b2 b1 b0 initial value r/w gpdir 0x42 - * 1 - * 1 - * 1 - * 1 pd3 pd2 pd1 pd0 0x00 r/w *1 prohibition against writing (2) gpin: input state confirmation register of the gpio terminal this register defines the state of the gpio port. only the bit set a s an input port in the input and output direction setting registers of the gpio port is enabled. when h is input into the port, the corresponded register becomes 1. when l was input into the port, the corresponded register be comes 0. name add- ress b7 b6 b5 b4 b3 b2 b1 b0 initial value r/w gpin 0x40 - * 1 - * 1 - * 1 - * 1 pi3 pi2 pi1 pi0 - r *1 prohibition against writing (3) gpout: output setting register of the gpio terminal this register sets an output level to the gpio port. only the bit s et as an out put port in the input and output direction setting registers of the gpio port is enabled. when the register is 1, the corresponded port outputs h. when the register is 0, the corresponded port outputs l. name add- ress b7 b6 b5 b4 b3 b2 b1 b0 initial value r/w gpout 0x41 - * 1 - * 1 - * 1 - * 1 po3 po2 po1 po0 0x00 r/w *1 prohibition against writing (4) gppu: the pull- up resistance of gpio port setting register this register sets the pull-up resistance of each gpio port. if se t to 1, the resistance connect ed to vdd power supply is enabled . if set to 0, it is disabled. name add- ress b7 b6 b5 b4 b3 b2 b1 b0 initial value r/w gppu 0x43 - * 1 - * 1 - * 1 - * 1 ppu3 ppu2 ppu1 ppu0 0x00 r/w *1 prohibition against writing (5) gppd: the pull-down resistance of gpio port setting register this register set s the pull-down resistance of each gpio port. i f set to 1, the resistance connect ed to gnd is enabled . if set to 0, it is disabled. the initial value of this registe r is 0x0f, and the pull-down resistance is enabled. name add- ress b7 b6 b5 b4 b3 b2 b1 b0 initial value r/w gppd 0x44 - * 1 - * 1 - * 1 - * 1 ppd3 ppd2 ppd1 ppd0 0x0f r/w *1 prohibition against writing downloaded from: http:///
17 / 35 tsz02201-0f2f0ak00130-1-2 ? 2015 rohm co., ltd. all rights reserved. 25.mar.2016 rev.003 www.rohm.com tsz22111 ? 15 ? 001 bd57020mwv adapter voltage adpv adpi rs 10. protective circuit bd 57020 mwv has the following functions as a protection feature. protection name detection terminal detection condition resolutive condition protection type ovlo_vin vin vin > 6.4v vin <6.2v system hung uvlo_vin vin vin <3.4v vin > 3.6v system hung internal ocp vin icc > iocp = 0.48a icc vocp = 160mv adpv - adp i <160mv and register ( note 1 ) 0xb1 = 0x08 * pre -driver block stop the lside = hside = l output uvlo_adpv adpv vin <4.3v vin > 4.5v pre -driver block stop ( note 2 ) lside = h, hside = l uvlo_vdd vdd vdd <2.5v vdd > 2.8v power-on reset cancellation resetb = l uvlo_vddio vddio vddio <2.5v vddio > 2.8v io block disable (note1) it is necessary to reset it from a register to cancel external over current protection. it can reset external overcurrent protection by writing in 0x08 at address 0xb1. however, please set 0 by all means because this reg ister does not automatically return to 0 after setting it to 0x08. (note2) bd57020mwv can mask the pre-driver block stop even if it detec ts uvlo_adpv depending on the register setting. (1) err_mode: error mode setting register in uvlo_adpv this register configures the error mode in uvlo_adpv. if err_sel = 1, the pre-driver block works regardless of uvlo_adpv. if err_sel = 0, th e pre -driver block stops if it detects uvlo_adpv. name add- ress b7 b6 b5 b4 b3 b2 b1 b0 initial value r/w err_mode 0xc4 - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 err_ sel - * 1 0x00 r/w *i am prohibited from 1 note about external ocp movement bd57020mwv monitors the input current to the tx. if there is an ex cessive flow of electric current, it will st op the operation of the pre-driver block. then, lside1 (lside2) terminal and the hside1 (hside2) terminal become the l output. the relation of current limit i lim and the current sense resistor r s , is determined by the following formula: ][ a r v i s ocp lim ? in this formula, v ocp is the ocp detecting voltage . for example, i lim becomes 1.6a if rs=100m and vocp=160mv (typ). th e value of r s is between 30 ~ 47 m when adapter voltage is 5v . and the value of r s is between 30 ~ 100 m when adapter voltage is 12v or 19v. please be careful enough on the occasion of the value se tting with the set. figure 5. the input current detection downloaded from: http:///
18 / 35 tsz02201-0f2f0ak00130-1-2 ? 2015 rohm co., ltd. all rights reserved. 25.mar.2016 rev.003 www.rohm.com tsz22111 ? 15 ? 001 bd57020mwv 11. command interface 11 -1 .c ommand interface i2c bus method is used in command interface with host cpu on bd57020mwv . in bd57020mwv, not only writing but read-out is possible except for s ome registers. besides the slave address in bd57020mwv, one byte select add ress can be specified, written and readout. the format of i2c bus slave mode is shown below. the slave address of bd57020mwv is 0x44 (7bit) while addr te rminal input is l. it is 0x45 (7bit) while addr terminal input is h. msb lsb msb lsb msb lsb s slave address a select address a data a p s: start condition slave address: putting up the bit of read mode (h") or write mode (l") after slave address (7bit) set with addr, the data of eight bits in total will be sent. (msb first) a: the acknowledge bit in each byte adds into the data when ackno wledge is sent and received. when data is correctly sent and received, "l" will be sent and received. th ere was no acknowledge for "h". select address: 1 byte select address is used in bd57020mwv. (msb first) data: data byte, data (the msb first) sent and received p: stop condition sda scl s start condition sr repeated start condition figure 6. command interface figure 7. repeated start condition sda scl msb 6 5 lsb start condition when sda ? , scl = h stop condition when sda ? , scl = h downloaded from: http:///
19 / 35 tsz02201-0f2f0ak00130-1-2 ? 2015 rohm co., ltd. all rights reserved. 25.mar.2016 rev.003 www.rohm.com tsz22111 ? 15 ? 001 bd57020mwv 11 -2.data format write format b7 b6 b5 b4 b3 b2 b1 b0 r /w slave address (7bit) s a c k b7 b6 b5 b4 b3 b2 b1 b0 select address (8bit) a c k b7 b6 b5 b4 b3 b2 b1 b0 write data (8bit) a c k p start condition '0' write acknowledge from slave device stop condition acknowledge from slave device acknowledge from slave device figure 8. write data format read format b7 b6 b5 b4 b3 b2 b1 b0 r /w slave address (7bit) s a c k b7 b6 b5 b4 b3 b2 b1 b0 read data (8bit) a c k b7 b6 b5 b4 b3 b2 b1 b0 read data (8bit) n ak p start condition '1' read acknowledge from slave device stop condition acknowledge from master device non acknowledge from master device figure 9. read data format read data from specified select address b7 b6 b5 b4 b3 b2 b1 b0 r /w slave address (7bit) s a c k b7 b6 b5 b4 b3 b2 b1 b0 select address (8bit) a c k '0' write b7 b6 b5 b4 b3 b2 b1 b0 r /w slave address (7bit) sr a c k b7 b6 b5 b4 b3 b2 b1 b0 read data n a c '1' read p read data from select address repeated start condition figure 10. read data from specified select address (1) b7 b6 b5 b4 b3 b2 b1 b0 r /w slave address (7bit) s a c k b7 b6 b5 b4 b3 b2 b1 b0 select address (8bit) a c k '0' read b7 b6 b5 b4 b3 b2 b1 b0 r /w slave address (7bit) s a c k b7 b6 b5 b4 b3 b2 b1 b0 read data n a c '1' read p p read data from select address figure 11. read data from specified select address (2) downloaded from: http:///
20 / 35 tsz02201-0f2f0ak00130-1-2 ? 2015 rohm co., ltd. all rights reserved. 25.mar.2016 rev.003 www.rohm.com tsz22111 ? 15 ? 001 bd57020mwv 11 -3. control signal specifications bus line, i/o stage electrical specification and timing figure 12. timing chart table 11-1. sdai and scli bus-line characteristic (unless specified, ta = 25 degrees celsius, vdd=3.3 v) parameter sign draft mode unit min. max. 1 scl clock frequency f scl 0 400 khz 2 bus free time between a "stop" condition and "start" conditions t buf 1.3 s 3 it is a "start" condition (retransmission) in hold time. after this period, the first clock pulse is generated. t hdsta 0.6 s 4 lo w state hold time of the scl clock t low 1.3 s 5 high state hold time of the scl clock t high 0.6 s 6 setup time of the retransmission "start" condition t susta 0.6 s 7 data hold time t hddat 0 note1) s 8 data setup time t sudat 100 ns 9 rise time of sda and the scl traffic light t r 20+0.1cb 300 ns 10 fall time for sda and scl signaling tf 20+0.1cb 300 ns 11 setup time of the "stop" condition t susto 0.6 s 12 capacitive load of each bus line c b 400 pf the above-mentioned numerical values are all the values correspondi ng to vih min and vil max level. note 1) to exceed an undefined area on falling edged of scli, tra nsmission device should internally offer the hold-time of 300ns o r more for sdai signal (vih min of scli signal). the above-mentioned characteristic is a theory value in ic de sign and it doesn't be guaranteed by shipment inspection. when problem occurs by any chance, we talk in good faith an d correspond . t b u f t l o w t r t h d s t a s p t h d d a t t f t h i g h t s u d a t t s u s t a sr t h d s t a t s u s t o p s d a s c l downloaded from: http:///
21 / 35 tsz02201-0f2f0ak00130-1-2 ? 2015 rohm co., ltd. all rights reserved. 25.mar.2016 rev.003 www.rohm.com tsz22111 ? 15 ? 001 bd57020mwv 11 -4. list of registers name add- ress b7 b6 b5 b4 b3 b2 b1 b0 initial value r/w ident 0x00 did7 did6 did5 did4 did3 did2 did1 did0 0x15 r rxctrl 0x01 ctrl - * 1 fte2 fte1 - * 1 - * 1 pre2 pre1 0x00 r/w rxstt 0x02 bsy2 bsy1 - * 1 - * 1 rerr cerr rcv2 rcv1 0x00 r intstt 0x03 - * 1 apint - * 1 agint rint cint rint2 rint1 0x00 r/w intenb 0x04 pxien apien - * 1 agien rien cien rien2 rien1 0x00 r/w reserved 0x05 : 0x07 - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 - - * 1 ainsel 0x08 - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 ain1 sel1 - * 1 0x00 r/w reserved 0x09 : 0x0b - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 - - * 1 clkdiv1l 0x0c clk div7 clk div6 clk div5 clk div4 clk div3 clk div2 clk div1 clk div0 0xe7 r/w clkdiv1h 0x0d clk div15 clk div14 clk div13 clk div12 clk div11 clk div10 clk div9 clk div8 0x03 r/w reserved 0x0e - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 - - * 1 pwrctrl 0x0f - * 1 - * 1 pwmd1 pwmd0 - * 1 oscsel tcxen tcxsel 0x07 r/w reserved 0x10 : 0x11 - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 - - * 1 pdctrl0 0x12 - * 1 - * 1 - * 1 pwm1 en - * 1 ps256 pswen pden 0x00 r/w reserved 0x13 : 0x15 - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 - - * 1 apgctrl 0x16 apen - * 1 - * 1 - * 1 - * 1 - * 1 apex1 apex0 0x00 r/w apgstt 0x17 - * 1 apsta2 apsta1 apsta0 - * 1 - * 1 - * 1 - * 1 0x00 r/w apgitvl 0x18 apg itv7 apg itv6 apg itv5 apg itv4 apg itv3 apg itv2 apg itv1 apg it v0 0x00 r/w apgitvh 0x19 apg itv15 apg itv14 apg itv13 apg itv12 apg itv11 apg itv10 apg itv9 apg itv8 0x00 r/w apgdurl 0x1a apg dur7 apg dur6 apg dur5 apg dur4 apg dur3 apg dur2 apg dur1 apg dur0 0x00 r/w apgdurh 0x1b - * 1 - * 1 - * 1 - * 1 apg dur11 apg dur9 apg dur8 apg dur7 0x00 r/w apgmsrl 0x1c apg msr7 apg msr6 apg msr5 apg msr4 apg msr3 apg msr2 apg msr1 apg msr0 0x00 r/w apgmsrh 0x1d apgms r15 apgms r14 apgms r13 apgms r12 apgms r11 apgms r10 apgms r9 apgms r8 0x00 r/w apgcnt 0x1e apg cnt7 apg cnt6 apg cnt5 apg cnt4 apg cnt3 apg cnt2 apg cnt1 apg cnt0 0x00 r/w reserved 0x1f - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 - - * 1 pwm0prdl 0x20 pwm0 prd7 pwm0 prd6 pwm0 prd5 pwm0 prd4 pwm0 prd3 pwm0 prd2 pwm0 prd1 pwm0 prd0 0x00 r/w pwm0prdh 0x21 pwm0 prd15 pwm0 prd14 pwm0 prd13 pwm0 prd12 pwm0 prd11 pwm0 prd10 pwm0 prd9 pwm0 prd8 0x00 r/w pwm0dtyl 0x22 pwm0 dty7 pwm0 dty6 pwm0 dty5 pwm0 dty4 pwm0 dty3 pwm0 dty2 pwm0 dty1 pwm0 dty0 0x00 r/w pwm0dtyh 0x23 pwm0 dty15 pwm0 dty14 pwm0 dty13 pwm0 dty12 pwm0 dty11 pwm0 dty10 pwm0 dty9 pwm0 dty8 0x00 r/w pwm1phsl 0x24 pwm1 phs7 pwm1 phs6 pwm1 phs5 pwm1 phs4 pwm1 phs3 pwm1 phs2 pwm1 phs1 pwm1 phs0 0x00 r/w pwm1phsh 0x25 pwm1 phs15 pwm1 phs14 pwm1 phs13 pwm1 phs12 pwm1 phs11 pwm1 phs10 pwm1 phs9 pwm1 phs8 0x00 r/w pwmxp rdl 0x26 pwmx prd7 pwmx prd6 pwmx prd5 pwmx prd4 pwmx prd3 pwmx prd2 pwmx prd1 pwmx prd0 0x00 r/w pwmxprdh 0x27 pwmx prd15 pwmx prd14 pwmx prd13 pwmx prd12 pwmx prd11 pwmx prd10 pwmx prd9 pwmx prd8 0x00 r/w pwmxdtyl 0x28 pwmx dty7 pwmx dty6 pwmx dty5 pwmx dty4 pwmx dty3 pwmx dty2 pwmx dty1 pwmx dty0 0x00 r/w pwmxdtyh 0x29 pwmx dty15 pwmx dty14 pwmx dty13 pwmx dty12 pwmx dty11 pwmx dty10 pwmx dty9 pwmx dty8 0x00 r/w reserved 0x2a : 0x2f - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 - - * 1 pwmgen0 0x30 p0dly d1 p0dly d0 p0dly c2 p0dly c1 p0dly c0 p0dly b2 p0dly b1 p0dly b0 0x92 r/w *1 prohibition against writing *0x in the head of for each characters means a hex digit. if there is nothing, it means decimal numeral downloaded from: http:///
22 / 35 tsz02201-0f2f0ak00130-1-2 ? 2015 rohm co., ltd. all rights reserved. 25.mar.2016 rev.003 www.rohm.com tsz22111 ? 15 ? 001 bd57020mwv name add- ress b7 b6 b5 b4 b3 b2 b1 b0 initial value r/w pwmgen1 0x31 p1dly d1 p1dly d0 p1dly c2 p1dly c1 p1dly c0 p1dly b2 p1dly b1 p1dly b0 0x92 r/w reserved 0x32 : 0x3f - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 - - * 1 gpin 0x40 - * 1 - * 1 - * 1 - * 1 pi3 pi2 pi1 pi0 - r gpout 0x41 - * 1 - * 1 - * 1 - * 1 po3 po2 po1 po0 0x00 r/w gpdir 0x42 - * 1 - * 1 - * 1 - * 1 pd3 pd2 pd1 pd0 0x00 r/w gppu 0x43 - * 1 - * 1 - * 1 - * 1 ppu3 ppu2 ppu1 ppu0 0x00 r/w gppd 0x44 - * 1 - * 1 - * 1 - * 1 ppd3 ppd2 ppd1 ppd0 0xff r/w reserved 0x45 : 0x4f - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 - - * 1 rxcnt_1 0x50 - * 1 - * 1 - * 1 - * 1 rx1 cnt3 rx1 cnt2 rx1 cnt1 rx1 cnt0 0x00 r/w rxcnt_2 0x51 - * 1 - * 1 - * 1 - * 1 rx2 cnt3 rx2 cnt2 rx2 cnt1 rx2 cnt0 0x00 r/w rxstt_1 0x52 pre1 bsy1 rdn1 erf1 erp1 erc1 rcv2 rcv1 0x00 r rxstt_2 0x53 pre2 bsy2 rdn2 erf2 erp2 erc2 rcv2 rcv1 0x00 r reserved 0x54 : 0x5f - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 - - * 1 rxdat_1 0x60 : 0x7f 0x00 r rxdat_2 0x80 : 0x9f 0x00 r fltprdl 0xa0 flt prd7 flt prd6 flt prd5 flt prd4 flt prd3 flt prd2 fl t prd1 flt prd0 0x00 r/w fltprdh 0xa1 flt prd15 flt prd14 flt prd13 flt prd12 flt prd11 flt prd10 flt prd9 flt prd8 0x00 r/w reserved 0xa2 : 0xaf - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 - - * 1 ana_stat 0xb0 - * 1 - * 1 - * 1 - * 1 ocp - * 1 - * 1 - * 1 0x02 r ana_err_ clr 0xb1 - * 1 - * 1 - * 1 - * 1 ocp ercl - * 1 - * 1 - * 1 0x00 r/w reserved 0xb2 : 0xc3 - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 - - * 1 err_mode 0xc4 - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 err_ sel - * 1 0x00 r/w reserved 0xc5 : 0xff - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 - * 1 - - * 1 *1 prohibition against writing *0x in the head of for each characters means a hex digit. if there is nothing, it means decimal numeral downloaded from: http:///
23 / 35 tsz02201-0f2f0ak00130-1-2 ? 2015 rohm co., ltd. all rights reserved. 25.mar.2016 rev.003 www.rohm.com tsz22111 ? 15 ? 001 bd57020mwv typical performance curves figure 13. i cc1 [ma] vs. temp. [c] (tcxoin clk = 0khz) figure 14. i cc2 [ma] vs. temp. [c] (tcxoin clk = 32mhz) figure 15. output voltage v ldo33a [v] vs. temp. [c] (output current = 0ma) figure 16. output voltage v ldo33a [v] vs output current [ma] (temp. = 25c) 3.00 3.10 3.20 3.30 3.40 3.50 3.60 0 10 20 30 40 output current [ma] output voltage vldo33a [v] 3.00 3.10 3.20 3.30 3.40 3.50 3.60 -20 0 20 40 60 80 temp. [ ? ] output voltage vldo33a [v] 1.40 1.60 1.80 2.00 2.20 2.40 -20 0 20 40 60 80 temp [ ? ] input current icc1 [ma] 12.0 13.0 14.0 15.0 16.0 -20 0 20 40 60 80 temp [ ? ] input current icc2 [ma] downloaded from: http:///
24 / 35 tsz02201-0f2f0ak00130-1-2 ? 2015 rohm co., ltd. all rights reserved. 25.mar.2016 rev.003 www.rohm.com tsz22111 ? 15 ? 001 bd57020mwv 19v vin ldo33b tcxoen adpv 5v 3.3v ldo33a 3.3v lside1 ??? ??? ??? ??? ??? ??? analog ping 100 usec digital ping 70msec min = 1msec ??? ??? ??? ??? typical performance curves - continued figure 17-1. system efficiency [%] vs rx output power [w] (rx=bd57011gwl,vout=5v) figure 17-2. system efficiency [%] vs rx output power [w] (rx=bd57015gwl,vout= 10 v) timing chart figure 18. start up sequence 0 10 20 30 40 50 60 70 80 0.0 1.0 2.0 3.0 4.0 5.0 rx output power [w] system efficiency [%] 0 10 20 30 40 50 60 70 80 90 0.0 2.0 4.0 6.0 8.0 10.0 rx output power [w] system efficiency [%] downloaded from: http:///
25 / 35 tsz02201-0f2f0ak00130-1-2 ? 2015 rohm co., ltd. all rights reserved. 25.mar.2016 rev.003 www.rohm.com tsz22111 ? 15 ? 001 bd57020mwv application example 1) recommended circuit diagram cv33b cv33a 3.3v 3.3vb gnd tcxoin rtcxout osc gnd gnd rosc tg_gpio0 tg_gpio1 tg_gpio2 gnd cvin1 5v cdc2 cdc1 led4 rled4 gnd gnd gnd rs2 rs1 rsin+ rsin- csin out ref in- in+v+ gnd 3.3v pgnd pgnd cpa2 csout pgnd gnd rtvin rvin1 rvin2 m9 u4 ina199a1 rsout m1 cadp4 cadp3 pgnd pgnd pgndgnd rtvq rvq1 rgpd cqout2 cqout1 rqout1 rqout2 gnd gnd v adpv gnd adpv com-ch gnd gnd pwrpath_en_gpo rppen m2 rpph rppg sldo_en_gpo m6 rgpu m7 dvq rvq2 m3 rqpd rdch m8 dchctrl gnd gnd gnd rqin1 rqin2 m5 dtvin moni0_pa0 moni1-pa1 1 2 34 5 6 78 9 10 ovpin ldo33b ldo33a vdd tcxoen tcxoin tcxoout gpio0 gpio1 gpio2 gpio3 refgnd adpv adpi moni1 moni0 vinvin ovpout add boot1 4039 38 37 36 35 34 33 32 31 3028 2927 26 24 25 2322 21 sw1 hside1 lside1 pgnd lside2 hside2 sw2 boot2 test coil_in gnd cboot1 rh1 rhd1 rl1 rld1 mos_h1 mos_l1 pgnd lside2 hside2 cboot2 gnd lside2 hside2 rh2 rhd2 rl2 rld2 ltx1 ltx2 mos_h2 mos_l2 cs1 cs2 cs3 ccoilv rvdl2 m10 pgnd rcoilin_cpo rvdh rvdl pgnd 3.3v cclmp rclmp in+ vss in- vdd out 5v cpa 3.3v rrefh rrefl1 rrefl2 m4 gnd gnd vddio clkin clkset fskin scl sda intb resetb agnd 1112 13 14 1516 17 18 19 20 1 2 34 5 6 78 test pd1 pb0 nc4 pb1 pb2 pb3 pa2 testf pd2 pc3 pd3 pd4 pc2 pd5 pa1 9 1011 12 1314 15 16 2423 22 20 21 19 18 17 pb7 pc7 vdd vss nc20 pb6 pb5 pb4 reset_n pd0 pc0 pc4 pc5 pc1 pc6 pa0 3231 30 29 28 27 26 25 reset_n test gnd pgnd jp6 jp5 gnd r8 rcoilin_gpo gnd c4 vpp cosc1 cosc2 tg_gpio3 gnd moni0_pa0 gnd cain0 dchctrl rled3 led3 3.3vb 3.3v rscl rsda gnd cscl csda 3.3vb pwrpath_en_gpo moni1-pa1 cain1 gnd sldo_en_gpo rled2 led2 rled1 led1 gnd c8 c2 gnd gnd gndgnd gnd cadp2 cadp1 u1 bd57020mwv u2 ml610q772 u3 bu7241g 1 2 3 4 5 6 12 3 4 5 rx-d for debugger * thermal pad is connected to the gnd. rvin3 gnd changing the software may cause the changing the circuit diagra m. figure 19. typical application circuit diagram 2) parts list parts name recommended value unit recommended part maker number tx coil ltx 24 h 760 308 110 wrth 1 ic u1 - - bd57020mwv rohm 1 u2 - - ml610q772 lapis 1 u3 - - bu7241g rohm 1 u4 - - ina199a1 ti 1 osc 32 mhz nx3225ga ndk 1 fet/tr mos_h2, mos_l2 10 a rq3e100gn rohm 2 mos_h1, mos_l1, m7 10 a rq3e100gn rohm 3 m1 -7 a rq1e070rp rohm 1 m2, m4, m6, m8, m10 0.2 a rue002n02 rohm 5 m3, m5, m9 2 a rur020n02 rohm 3 diode/led dvq 6.8 v edzte616.8b rohm 1 dtvin 6.2 v edzte616.2b rohm 1 led1, led2, led3, led4 vf<2.0v - sml-p11mt rohm 4 downloaded from: http:///
26 / 35 tsz02201-0f2f0ak00130-1-2 ? 2015 rohm co., ltd. all rights reserved. 25.mar.2016 rev.003 www.rohm.com tsz22111 ? 15 ? 001 bd57020mwv parts name recommended value unit recommended part maker number coil/trans com_ch - ohm - - short capacitor cadp1 0.1 f - murata 1 cadp2 10 f - murata 1 cadp3 10 f - murata 1 cadp4 22 f - murata 1 cs1 0.033 f grm32d7u2e333jw31 murata 1 cs2 0.033 f grm32d7u2e333jw31 murata 1 cs3 0.033 f grm32d7u2e333jw31 murata 1 cvin1 1 f - murata 1 cboot1, cboot2 0.22 f - murata 1 cdc1, cdc2 10 f - murata 2 cv33b 1 f - murata 1 cv33a 1 f - murata 1 cscl 10 pf - murata 1 csda - f - - open cain0 0.1 f - murata 1 cain1 0.01 f - murata 1 ccoilv 1000 pf grm21a7u2e102jw31 murata 1 cclmp - f - - open cpa 0.01 f - murata 1 cpa2 0.01 f - murata 1 csin 0.1 f - murata 1 csout - f - - open cqout1 47 f - murata 1 cqout2 1 f - murata 1 cosc1, cosc2 - f - - open c2 1 f - murata 1 c4 4700 pf - murata 1 c8 2200 pf - murata 1 resistor rs1, rs2 100 m - rohm 2 rtcxout 1 m - rohm 1 rh1, rh2 20 - rohm 2 rhd1, rhd2 2 m - rohm 2 rl1, rl2 20 - rohm 2 rld1, rld2 - - - open rtvin 100 k - rohm 1 rvin1, rvin2, rvin3 680 - rohm 3 rdch 1 k - rohm 1 rscl 1.5 k - rohm 1 rsda 3.3 k - rohm 1 rled1, rled2, rled3 1.5 k - rohm 3 rled4 3 k - rohm 1 rpph 100 k - rohm 1 rppen 100 k - rohm 1 rppg 100 k - rohm 1 rtvq 100 k - rohm 1 rvq1, rvq2 47 - rohm 2 rqpd 100 k - rohm 1 rgpd 100 k - rohm 1 downloaded from: http:///
27 / 35 tsz02201-0f2f0ak00130-1-2 ? 2015 rohm co., ltd. all rights reserved. 25.mar.2016 rev.003 www.rohm.com tsz22111 ? 15 ? 001 bd57020mwv parts name recommended value unit recommended part maker number rgpu 10 k - rohm 1 rqin1, rqin2 12 - rohm 2 rqout1 2 k - rohm 1 rqout2 200 k - rohm 1 rrefh 100 k - rohm 1 rrefl1 1 m - rohm 1 rrefl2 4.7 k - rohm 1 rosc - - - short rvdh 33 k mcr10ezhf333 rohm 1 rvdl 6.2 k - rohm 1 rvdl2 6.2 k - rohm 1 rclmp - - - open rsin- 1 - rohm 1 rsin+ 1 - rohm 1 rsout 1 k - rohm 1 r8 36 k - rohm 1 3) selection of components externally connected component symbol limit unit boot1 (2) terminal strapping capacity cboot1, cboot2 0.1 to 0.47 f ldo33a (b) terminal strapping capacity cv33a, cv33b 0.47 to 2.0 f l side fet gate resistance rl1, rl2 1.0 to 30 h side fet gate resistance rh1, rh2 1.0 to 30 input current sense resistance rs 30 to 100 m about the above operating condition, it is the value in the ic onl y. please be careful enough on the occasion of the value setting w ith the set. downloaded from: http:///
28 / 35 tsz02201-0f2f0ak00130-1-2 ? 2015 rohm co., ltd. all rights reserved. 25.mar.2016 rev.003 www.rohm.com tsz22111 ? 15 ? 001 bd57020mwv power dissipation (uqfn040v5050 package) use a thermal design that allows for a sufficient margin by taking into account the permissible power dissipation (pd ) in actual operating conditions. figure 20. power dissipation curve (pd-ta curve) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0 25 50 75 100 125 150 ambient temperature : ta [c] power dissipation : pd [w] 3.26w * 74.2mm x 74.2mm x 1.6mm glass epoxy board (front and back layer heat radiation copper foil 4.5 mm x 4.5 mm, second and third layer heat radiation copper foil 74.2 mm x 74 .2 mm) downloaded from: http:///
29 / 35 tsz02201-0f2f0ak00130-1-2 ? 2015 rohm co., ltd. all rights reserved. 25.mar.2016 rev.003 www.rohm.com tsz22111 ? 15 ? 001 bd57020mwv i/o equivalent circuits vin, ovpout terminal ovpout vin boot1, hside1, sw1, lside1, pgnd terminal (boot2, hside2, sw2, lside2) ovpout boot1 (2) hside1 (2) sw1 (2) lside1 (2) pgnd ovpin, ldo33a (ldo33b) terminal ldo33a(b) ovpin vdd,tcxoin, tcxoout terminal vdd tcxoin tcxoout vdd vdd vdd tcxoen terminal vdd tcxoen vddio, fskin (clkset, clkin, addr, test) terminal clkin clkset fskin addr test vddio vddio downloaded from: http:///
30 / 35 tsz02201-0f2f0ak00130-1-2 ? 2015 rohm co., ltd. all rights reserved. 25.mar.2016 rev.003 www.rohm.com tsz22111 ? 15 ? 001 bd57020mwv gpio0 (gpio1, 2, 3) terminal gpio0 gpio1 gpio2 gpio3 vdd vdd vdd vdd scl terminal vddio scl sda terminal vddio sda intb terminal intb moni0 terminal vdd moni0 resetb terminal resetb vdd vdd coil_in terminal coil_in adpv, adpi terminal adpi adpv moni1 terminal moni1 downloaded from: http:///
31 / 35 tsz02201-0f2f0ak00130-1-2 ? 2015 rohm co., ltd. all rights reserved. 25.mar.2016 rev.003 www.rohm.com tsz22111 ? 15 ? 001 bd57020mwv operational notes 1. reverse connection of power supply connecting the power supply in reverse polarity can damage the ic. take precautions against reverse polarity when connecting the power supply, such as mounting an extern al diode between the power supply and the ic s power supply pin s. 2. power supply lines design the pcb layout pattern to provide low impedance sup ply lines. separate the ground and supply lines of the digital and analog blocks to prevent noise in the grou nd and supply lines of the digital block from affecting the analog block. furthermore, connect a capacitor to ground at all pow er supply pins . consider the effect of temperature and aging on the capacitance value when using electrolytic capa citors. 3. ground voltage ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition. 4. ground wiring pattern when using both small-signal and large-current ground traces , the two ground traces should be routed separately but connected to a single ground at the reference point of the application board to avoid fluctuations in the small- signal ground caused by large currents. also ensure that the ground traces of external components do not cause variations on the ground voltage. the ground lines must be as short and thick as possible to reduce line impedance. 5. thermal consideration should by any chance the power dissipation rating be exc eeded the rise in temperature of the chip may result in deterioration of the properties of the chip. in case of exceeding th is absolute maximum rating, increase the board size and copper area to prevent exceeding the pd rating. 6. recommended operating conditions these conditions represent a range within which the expe cted characteristics of the ic can be approximately obtained . the electrical characteristics are guaranteed under the condi tions of each parameter. 7. inrush current when power is first supplied to the ic, it is possible that the internal logic may be unstable and inrush current may flow instantaneously due to the internal powering sequence and delays, especially if the ic has more than one powe r supply. therefore, give special consideration to power co upling capacitance, power wiring, width of ground wiring, and routing of connections. 8. operation under strong electromagnetic field operating the ic in the presence of a strong electromagnetic field ma y cause the ic to malfunction. 9. testing on application boards when testing the ic on an application board, connecting a capacitor directly to a low-impedance output pin may subject the ic to stress. always discharge capacitors comple tely after each process or step. t he ics power supply should always be turned off completely before connecting or removing it from the test setup during the inspection process. to prevent damage from static discharge, ground the ic during assembly and use similar precautions during transport and storage. 10. inter-pin short and mounting errors ensure that the direction and position are correct when mountin g the ic on the pcb. incorrect mounting may result in damaging the ic. avoid nearby pins being shorted to each other especially to ground , power supply and output pin . inter-pin shorts could be due to many reasons such as me tal particles, water droplets (in very humid environment) and unintentional solder bridge deposited in between pins du ring assembly to name a few. 11. unused input pins input pins of an ic are often connected to the gate of a mos tra nsistor. the gate has extremely high impedance and extremely low capacitance. if left unconnected, the elec tric field from the outside can easily charge it. the smal l charge acquired in this way is enough to produce a signi ficant effect on the conduction through the transistor and cause unexpected operation of the ic. so unless otherwise spec ified, unused input pins should be connected to the power supply or ground line. downloaded from: http:///
32 / 35 tsz02201-0f2f0ak00130-1-2 ? 2015 rohm co., ltd. all rights reserved. 25.mar.2016 rev.003 www.rohm.com tsz22111 ? 15 ? 001 bd57020mwv operational notes C continu ed 12. regarding the input pin of the ic this monolithic ic contains p+ isolation and p substrate la yers between adjacent elements in order to keep them isolated. p-n junctions are formed at the intersection of t he p layers with the n layers of other elements, creating a parasitic diode or transistor. for example (refer to figure below): when gnd > pin a and gnd > pin b, the p-n junction operates as a paras itic diode. when gnd > pin b, the p-n junction operates as a parasitic transistor. parasitic diodes in evitably occur in the structure of the ic. the operation of parasitic diodes can result in mutual interference among circuits, operational faults, or physic al damage. therefore, conditions that cause these diodes to operate, such as applying a voltage lower than the gnd vo ltage to an input pin (and thus to the p substrate) should be avoided. figure 21. example of monolithic ic structure 13. ceramic capacitor when using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with temperature and the decrease in nominal capacitance due to dc bias a nd others. 14. area of safe operation (aso) operate the ic such that the output voltage, output current, and power dissipation are all within the area of safe operation (aso). 15. thermal shutdown circuit(tsd) this ic has a built-in thermal shutdown circuit that prevent s heat damage to the ic. normal operation should always be within the ics power dissipation rating. if however the ratin g is exceeded for a continued period, the junction temperature (tj) will rise which will activate the tsd circuit t hat will turn off all output pins. when the tj falls below the tsd threshold, the circuits are automatically restored to normal o peration. note that the tsd circuit operates in a situation that exceeds th e absolute maximum ratings and therefore, under no circumstances, should the tsd circuit be used in a set des ign or for any purpose other than protecting the ic from heat damage. 16. over current protection circuit (ocp) this ic incorporates an integrated overcurrent protection circui t that is activated when the load is shorted. this protection circuit is effective in preventing damage due to sudden and unexpected incidents. however, the ic should not be used in applications characterized by continuous ope ration or transitioning of the protection circuit. n n p + p n n p + p substrate gnd n p + n n p + n p p substrate gnd gnd parasitic elements pin a pin a pin b pin b b c e parasitic elements gnd parasitic elements c be transistor (npn) resistor n region close-by parasitic elements downloaded from: http:///
33 / 35 tsz02201-0f2f0ak00130-1-2 ? 2015 rohm co., ltd. all rights reserved. 25.mar.2016 rev.003 www.rohm.com tsz22111 ? 15 ? 001 bd57020mwv ordering information b d 5 7 0 2 0 m w v - e 2 part number package mwv: uqfn040v5050 packaging and forming specification e2: embossed tape and reel marking diagrams uqfn040v5050 (top view) d 5 7 0 2 0 part number marking lot number 1pin mark downloaded from: http:///
34 / 35 tsz02201-0f2f0ak00130-1-2 ? 2015 rohm co., ltd. all rights reserved. 25.mar.2016 rev.003 www.rohm.com tsz22111 ? 15 ? 001 bd57020mwv physical dimension, tape and reel information package name uqfn040v5050 downloaded from: http:///
35 / 35 tsz02201-0f2f0ak00130-1-2 ? 2015 rohm co., ltd. all rights reserved. 25.mar.2016 rev.003 www.rohm.com tsz22111 ? 15 ? 001 bd57020mwv revision history date revision changes 27.j ul .2015 00 1 new release 10.aug.2015 002 p1 figure2. deleted the line. p2 recommended operating conditions vadpv min = 4.8v vadpv min = 4.6v p5 pin description moni1 input voltage value and input current value output. input voltage value p15 about the input power detection changed the paragraphs. p25 figure1 9. circuit diagram modified. p25 to p27 parts list parts list modified. 25.mar. 2016 003 p1 figure 1. modified the figure. p3 electrical characteristics corrected the font of unit. p7 1. pre -driver block changed the sentence. corrected the font of unit. p11 (4) apgdur corrected the font of unit. p12 (5) apgmsr corrected the font of unit. p13 (1) rxctrl changed the sentence. p14 (3) clkdiv corrected the font of unit. (4) fltprd corrected the font of unit. p17 about external ocp movement changed the sentence. p24 typical performance curves changed a name of the efficiency data. figure 17. figure 17-1. added to the efficiency data. figure 17-2. p25 1) recommended circuit diagram modified the circuit diagram. p25 to p27 2) parts list modified the parts list. downloaded from: http:///
notice-p ga -e rev.003 ? 201 5 rohm co., ltd. all rights reserved. notice precaution on using rohm products 1. our products are designed and manufactured for application in ordinary electronic equipments (such as av equipment, oa equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). if you intend to use our products in devices requiring extremely h igh reliability (such as medical equipment (note 1) , transport equipment, traffic equipment, aircraft/spacecraft, nuclear powe r controllers, fuel controllers, car equipment including car accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or serious damage to property ( specific applications ), please consult with the rohm sales representative in adv ance. unless otherwise agreed in writing by rohm in advance, rohm s hall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arisin g from the use of any rohm s products for specific applications. (note1) medical equipment classification of the specific appl ications japan usa eu china class class class b class class class 2. rohm designs and manufactures its products subject to stri ct quality control system. however, semiconductor products can fail or malfunction at a certain rate. please be sure to implement, at your own responsibilities, adequ ate safety measures including but not limited to fail-safe desig n against the physical injury, damage to any property, whic h a failure or malfunction of our products may cause. the followi ng are examples of safety measures: [a] installation of protection circuits or other protective devic es to improve system safety [b] installation of redundant circuits to reduce the impact of single or multiple circuit failure 3. our products are designed and manufactured for use under standard conditions and not under any special or extraordinary environments or conditions, as exemplified be low. accordingly, rohm shall not be in any way responsible or liable for any damages, expenses or losses arising from th e use of any rohms products under any special or extraordinary environments or conditions. if yo u intend to use our products under any special or extraordinary environments or conditions (as exemplified belo w), your independent verification and confirmation of product performance, reliability, etc, prior to use, must be n ecessary: [a] use of our products in any types of liquid, including water, oils, chemicals, and organi c solvents [b] use of our products outdoors or in places where the products are exposed to direct sunlight or dust [c] use of our products in places where the products are e xposed to sea wind or corrosive gases, including cl 2 , h 2 s, nh 3 , so 2 , and no 2 [d] use of our products in places where the products are exposed t o static electricity or electromagnetic waves [e] use of our products in proximity to heat-producing component s, plastic cords, or other flammable items [f] sealing or coating our products with resin or other coating materials [g] use of our products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of flux is recommended); or washing our products by using water or water-soluble cleaning agents for cleaning residue after soldering [h] use of the products in places subject to dew condensation 4. the products are not subject to radiation-proof design. 5. please verify and confirm characteristics of the final or mou nted products in using the products. 6 . in particular, if a transient load (a large amount of load appl ied in a short period of time, such as pulse. is applied, confirmation of performance characteristics after on-board mou nting is strongly recommended. avoid applying power exceeding normal rated power; exceeding the power rating u nder steady-state loading condition may negatively affec t product performance and reliability. 7 . de -rate power dissipation depending on ambient temperature. wh en used in sealed area, confirm that it is the use in the range that does not exceed the maximum junction temperature. 8 . confirm that operation temperature is within the specified range desc ribed in the product specification. 9 . rohm shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in this document. precaution for mounting / circuit board design 1. when a highly active halogenous (chlorine, bromine, etc .) flux is used, the residue of flux may negatively affect prod uct performance and reliability. 2. in principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method mus t be used on a through hole mount products. i f the flow soldering method is preferred on a surface-mount p roducts , please consult with the rohm representative in advance. for details, please refer to rohm mounting specification downloaded from: http:///
notice-p ga -e rev.003 ? 201 5 rohm co., ltd. all rights reserved. precautions regarding application examples and external circuits 1. if change is made to the constant of an external circuit, p lease allow a sufficient margin considering variations o f the characteristics of the products and external components, inc luding transient characteristics, as well as static characteristics. 2. you agree that application notes, reference designs, and a ssociated data and information contained in this docum ent are presented only as guidance for products use. therefore, i n case you use such information, you are solely responsible for it and you must exercise your own independ ent verification and judgment in the use of such information contained in this document. rohm shall not be in any way respon sible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of such informat ion. precaution for electrostatic this product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. please take pr oper caution in your manufacturing process and storage so t hat voltage exceeding the products maximum rating will not be applied to products. please take special care under dry co ndition (e.g. grounding of human body / equipment / solder iro n, isolation from charged objects, setting of ionizer, friction prevention and temperature / humidity control). precaution for storage / transportation 1. product performance and soldered connections may deteriorate i f the products are stored in the places where: [a] the products are exposed to sea winds or corrosive gases, in cluding cl2, h2s, nh3, so2, and no2 [b] the temperature or humidity exceeds those recommended by rohm [c] the products are exposed to direct sunshine or condensation [d] the products are exposed to high electrostatic 2. even under rohm recommended storage condition, solderabil ity of products out of recommended storage time period may be degraded. it is strongly recommended to confirm so lderability before using products of which storage time is exceeding the recommended storage time period. 3. store / transport cartons in the correct direction, which is indi cated on a carton with a symbol. otherwise bent leads may occur due to excessive stress applied when dropping of a c arton. 4. use products within the specified time after opening a humi dity barrier bag. baking is required before using products of which storage time is exceeding the recommended storage tim e period. precaution for product label a two-dimensional barcode printed on rohm products label is f or rohm s internal use only. precaution for disposition when disposing products please dispose them properly usi ng an authorized industry waste company. precaution for foreign exchange and foreign trade act since concerned goods might be fallen under listed items of export control prescribed by foreign exchange and foreign trade act, please consult with rohm in case of export. precaution regarding intellectual property rights 1. all information and data including but not limited to appl ication example contained in this document is for reference only. rohm does not warrant that foregoing information or data will not infringe any intellectual property rights or any other rights of any third party regarding such information or data. 2. rohm shall not have any obligations where the claims, a ctions or demands arising from the combination of the products with other articles such as components, circuits, systems or ex ternal equipment (including software). 3. no license, expressly or implied, is granted hereby under any inte llectual property rights or other rights of rohm or any third parties with respect to the products or the information contai ned in this document. provided, however, that rohm will not assert it s intellectual property rights or other rights against you or you r customers to the extent necessary to manufacture or sell products containing the products, subject to th e terms and conditions herein. other precaution 1. this document may not be reprinted or reproduced, in whole or in part, without prior written consent of rohm. 2. the products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written consent of rohm. 3. in no event shall you use in any way whatsoever the pr oducts and the related technical information contained in the products or this document for any military purposes, includi ng but not limited to, the development of mass-destruction weapons. 4. the proper names of companies or products described in this document are trademarks or registered trademarks of rohm, its affiliated companies or third parties. downloaded from: http:///
datasheet datasheet notice ? we rev.001 ? 2015 rohm co., ltd. all rights reserved. general precaution 1. before you use our pro ducts, you are requested to care fully read this document and fully understand its contents. rohm shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny rohms products against warning, caution or note contained in this document. 2. all information contained in this docume nt is current as of the issuing date and subj ec t to change without any prior notice. before purchasing or using rohms products, please confirm the la test information with a rohm sale s representative. 3. the information contained in this doc ument is provi ded on an as is basis and rohm does not warrant that all information contained in this document is accurate an d/or error-free. rohm shall not be in an y way responsible or liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or concerning such information. downloaded from: http:///

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